Associate Professor, Computer Engineering

Baskin School of Engineering
1156 High St
Mail Stop SOE3
Santa Cruz, CA 95064

Phone Number: 831-406-1851 (VoIP)

Department: Computer Engineering

Office Location: Engineering 2, Room 225
Office Hours: Spring 2013: Monday 4-5pm

E-Mail Address:

Web Pages

• Matthew Guthaus' Personal Page
• VLSI Design Automation Group

Degrees

• Ph.D. in Electrical Engineering, 2006, The University of Michigan
• MSE in Electrical Engineering, 2000, The University of Michigan
• BSE in Computer Engineering, 1998, The University of Michigan

Biography

Matthew Guthaus is currently an Associate Professor at the University
of California Santa Cruz in the Computer Engineering
department. Matthew received his BSE in Computer Engineering in 1998,
MSE in 2000, and PhD in 2006 in Electrical Engineering all from The
University of Michigan. Matthew is a member of ACM, IFIP Working Group
10.5, and a Senior Member of IEEE. His research interests are in
high-performance and low-power clock distribution; design for
variability and reliability; low-power design and computer-aided
design of Integrated Circuits. Matthew is the recipient of a 2011 NSF
CAREER award and a 2010 ACM SIGDA Distinguished Service Award. He is
also the Director of the UCSC Summer Undergraduate Research Fellowship
in IT (SURF-IT), a National Science Foundation sponsored Research
Experience for Undergraduates (REU) site, and the Center for Digital
and Analog Integrated Circuits (CDAIS).

Research Areas

VLSI, CAD, design for reliability and variability, resonant clocking, sub-threshold circuits

Selected Publications

• Hu X, Guthaus MR. In Press. Distributed LC Resonant Clock Grid Synthesis. IEEE Transactions on Circuits and Systems I (TCAS-I).
• Guthaus, M. R., "Distributed LC Resonant Clock Tree Synthesis", International Symposium on Circuits and Systems (ISCAS), pp. 1215–1218, 2011.
• S. Kim, M.R. Guthaus. Low-Power Multiple-Bit Upset Tolerant Memory Optimization, International Conference on Computer-Aided Design (ICCAD), San Jose, CA, 2011, to appear.
• Hu, X., W. Condley, and M. R. Guthaus, "Library Aware Resonant Clock Synthesis (LARCS)", Design Automation Conference (DAC), pp. 145-150, 2012.
• S. Kim, M. R. Guthaus, Leakage-Aware Redundancy for Reliable Sub-threshold Memories, Design Automation Conference (DAC) , San Diego, CA, 2011.

Current and Future Classes

Spring 2013

• CMPE 122: Introduction to VLSI Digital System Design
• CMPE 222: VLSI Digital System Design
• CMPE 280G: VLSI/CAD Seminar

Students & Researchers

• John L Branscum III (Undergraduate)
• Brian Chen (Undergraduate)
• Hany Ahmed Fahmy (Graduate)
• Riadul Islam (Graduate)
• Mohd Jamil (Graduate)
• Benjamin LaCara (Graduate)
• Sheldon Logan (Graduate)
• Scott Pollack (Undergraduate)
• Kylan Douglas Roberson (Undergraduate)
• Rajsaktish Sankaranarayanan (Graduate)
• Rafael Trapani Possignolo (Graduate)
• Bin wu (Graduate)

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